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ACPL-M43U-000E
Wide Operating Temperature 1MBd Digital Optocoupler
Data Sheet
Lead (Pb) Free RoHS 6 fully compliant
RoHS 6 fully compliant options available; -xxxE denotes a lead-free product
Description
The ACPL-M43U is a single channel, high temperature, high CMR, high speed digital optocoupler in a five lead miniature footprint specifically used for industrial applications. The SO-5 JEDEC registered (MO-155) package outline does not require "through holes" in a PCB. This package occupies approximately one-fourth the footprint area of the standard dual-in-line package. The lead profile is designed to be compatible with standard surface mount processes. This digital optocoupler uses an insulating layer between the light emitting diode and an integrated photon detector to provide electrical insulation between input and output. Separate connections for the photodiode bias and output transistor collector increase the speed up to a hundred times over that of a conventional photo-transistor coupler by reducing the base-collector capacitance. The ACPL-M43U has an increased common mode transient immunity of 30kV/s minimum at VCM = 1500V over extended temperature range.
Features
* High Temperature and Reliability IPM Driver for Industrial Applications. * 30 kV/s High Common-Mode Rejection at VCM = 1500 V (typ) * Compact, Auto-Insertable SO5 Packages * Wide Temperature Range: -40C ~ 125C * High Speed: 1MBd (Typ) * Low LED Drive Current: 10mA (typ) * Low Propagation Delay: 300ns (typ) * Worldwide Safety Approval: - UL1577 recognized, 3750Vrms/1min - CSA Approved - IEC/EN/DIN EN 60747-5-2 Approved
Applications
* Industrial Intelligent Power Module isolation for motor controls * Isolated IGBT/MOSFET gate drive * AC and brushless dc motor drives * Industrial inverters for power supplies
Functional Diagram
1 6 5 3 4
Truth Table
LED ON OFF Vo
LOW HIGH
The connection of a 0.1 F bypass capacitor between pins 4 and 6 is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Ordering Information
Options Part Number
ACPL-M43U ACPL-M43U
RoHS Compliant
-000E -500E
Package
SO-5
Surface Mount
X X
Gullwing
Tape & Reel
X
UL 5000 VRMS/ 1 Minute rating
IEC/EN/DIN EN 60747-5-2
X X
Quantity
100 per tube 1500 per reel
To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACPL-M43U-500E to order product of Mini-flat Surface Mount 5-pin package in Tape and Reel packaging with RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Remarks: The notation `#XXX' is used for existing products, while (new) products launched since 15th July 2001 and RoHS compliant option will use `-XXXE`.
2
Package Outline Drawings
ACPL-M43U Small Outline SO-5 Package (JEDEC MO-155)
ANODE 4.4 0.1 (0.173 0.004)
1
6 5
VCC VOUT GND
M43U YWW
7.0 0.2 (0.276 0.008) CATHODE 3
4
0.4 0.05 (0.016 0.002) 3.6 0.1* (0.142 0.004) 2.5 0.1 (0.098 0.004) 0.102 0.102 (0.004 0.004) 0.216 0.038 (0.0085 0.0015) 7 MAX. 1.27 BSC (0.050) 0.71 MIN. (0.028) MAX. LEAD COPLANARITY = 0.102 (0.004)
DIMENSIONS IN MILLIMETERS (INCHES) * MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006) NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
Land Pattern Recommendation
4.4 (0.17)
Recommended Pb-Free IR Profile
TIME WITHIN 5 C of ACTUAL PEAK TEMPERATURE tp 20-40 SEC.
TEMPERATURE
2.5 (0.10)
1.3 (0.05)
Tp 217 C TL Tsmax Tsmin 150 - 200 C
260 +0/-5 C RAMP-UP 3 C/SEC. MAX.
RAMP-DOWN 6 C/SEC. MAX.
2.0 (0.080) 8.27 (0.325)
0.64 (0.025)
25
ts PREHEAT 60 to 180 SEC.
tL
60 to 150 SEC.
t 25 C to PEAK TIME
NOTES: The time from 25 C to peak temperature = 8 minutes max. Tsmax = 200 C, Tsmin = 150 C Non-halide ux should be used
3
Solder Reflow Temperature Profile
300 PREHEATING RATE 3C + 1C/-0.5C/SEC. REFLOW HEATING RATE 2.5C 0.5C/SEC. PEAK TEMP. 245C
PEAK TEMP. 240C
200 TEMPERATURE (C) 160C 150C 140C
2.5 C 0.5 C/SEC. 30 SEC. 3 C + 1C/-0.5C 30 SEC.
PEAK TEMP. 230C
SOLDERING TIME 200C
100
PREHEATING TIME 150C, 90 + 30 SEC. ROOM TEMPERATURE
50 SEC. TIGHT TYPICAL LOOSE
0
0
50
100 TIME (SECONDS)
150
200
250
Note: Non-halide flux should be used
Regulatory Information
The ACPL-M43U is approved by the following organizations:
UL
Approved under UL 1577, component recognition program up to VISO = 3750 VRMS expected prior to product release.
CSA
Approved under CSA Component Acceptance Notice #5.
IEC/EN/DIN EN 60747-5-2 Approved under:
* IEC 60747-5-2:1997 + A1 * EN 60747-5-2:2001 + A1 * DIN EN 60747-5-2 (VDE 0884 Teil 2)
4
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics*
Description
Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage 150 Vrms for rated mains voltage 300 Vrms for rated mains voltage 600 Vrms Climatic Classification Pollution Degree (DIN VDE 0110/1.89) Maximum Working Insulation Voltage Input to Output Test Voltage, Method b* VIORM x 1.875=VPR, 100% Production Test with tm=1 sec, Partial discharge < 5 pC Input to Output Test Voltage, Method a* VIORM x 1.5=VPR, Type and Sample Test, tm=60 sec, Partial discharge < 5 pC Safety-limiting values - maximum values allowed in the event of a failure. Case Temperature Input Current Output Power Insulation Resistance at TS, VIO = 500 V VIORM VPR
Symbol
Characteristic
I - IV I - III I - II 55/125/21 2 567 1063
Unit
Vpeak Vpeak
VPR
851
Vpeak
Highest Allowable Overvoltage (Transient Overvoltage tini = 10 sec) VIOTM
6000
Vpeak
TS IS, INPUT PS, OUTPUT RS
175 230 600 >109
C mA mW W
*Refer to the optocoupler section of the Isolation and Control Components Designer's Catalog, under Product Safety Regulations section, (IEC/ EN/DIN EN 60747-5-2) for a detailed description of Method a and Method b partial discharge test profiles.
Insulation and Safety Related Specifications
Parameter
Minimum External Air Gap (Clearance) Minimum External Tracking (Creepage)
Symbol
L(101) L(102)
ACPL-M43U-000E
5 5 0.08
Units
mm mm mm
Conditions
Measured from input terminals to output terminals, shortest distance through air. Measured from input terminals to output terminals, shortest distance path along body. Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. DIN IEC 112/VDE 0303 Part 1
Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) CTI
200
Volts
Isolation Group (DIN VDE0109)
IIIa
Material Group (DIN VDE 0110)
5
Absolute Maximum Ratings
Parameter
Storage Temperature Operating Temperature Lead Soldering Cycle Average Forward Input Current Peak Forward Input Current (50% duty cycle, 1ms pulse width) Peak Transient Input Current (<= 1us pulse width, 300ps) Reversed Input Voltage Input Power Dissipation Output Power Dissipation Average Output Current Peak Output Current Supply Voltage (Pins 6-4) Output Voltage (Pins 5-4) Solder Reflow Temperature Profile Temperature Time IF(avg) IF(peak) IF(trans) VR PIN PO IO Io(pk) VCC VO -0.5 -0.5
Symbol
TS TA
Min.
-55 -40
Max.
150 125 260 10 20 40 100 5 30 100 8 16 30 20
Units
C C C s mA mA mA V mW mW mA mA V V
Note
1 2
Pin 3 - 1 3 4
See Reflow Temperature Profile
Recommended Operating Conditions
Parameter
Supply Voltage Operating Temperature
Symbol
VCC TA
Min.
4.5 -40
Max.
15.0 125
Units
V C
Note
6
Electrical Specifications (DC)
Over recommended operating TA = -40C to 125C, unless otherwise specified. Parameter
Current Transfer Ratio Logic Low Output Voltage Logic High Output Current
Sym.
CTR VOL IOH
Min.
32 20
Typ.
45 45 0.1 0.003 0.01
Max.
80 0.4 0.5 0.5 1 50 200
Units
% % V V mA mA mA mA
Conditions
TA = 25C TA = 25C TA = 25C TA = 25C VO=0.4V VO=0.5V IO=3mA IO=2.4mA VO=VCC=5.5V VO=VCC=15V IF = 10mA, VO = open, VCC = 15V TA = 25C IF = 0mA, VO = open, VCC = 15V IF=10mA IF=10mA IR=10mA IF=0mA VCC=4.5V IF=10mA
Fig.
1,2,4
Note
5
7
Logic Low Supply Current Logic High Supply Current Input Forward Voltage Input Reversed Breakdown Voltage Temperature Coefficient of Forward Voltage Input Capacitance Input-Output Insulation Resistance (Input-Output) Capacitance (Input-Output)
ICCL
50
11
ICCH
0.02
1 2.5
mA mA V V V
11
VF BVR
1.45 1.35 5
1.5 1.5
1.85 1.95
TA=25C
3
DV/DTA
-1.5
mV/C
IF=10mA
CIN VISO 3750
90
pF VRMS
F = 1MHz, VF = 0 RH 50%, t = 1min, TA =25C VI-O = 500VDC F=1MHz 6, 7
RI-O CI-O
1012 0.6
W pF
6 6
7
Switching Specifications
Over recommended operating (TA = -40C to 125C), IF = 10mA, VCC = 5.0 V unless otherwise specified. Parameter
Propagation Delay Time to Logic Low at Output Propagation Delay Time to Logic High at Output Pulse Width Distortion
Symbol
TPHL
Min
0.08 0.06
Typ
0.20
Max
0.80 1.00
Units
ms ms ms ms ms ms ms ms kV/ms
Test Conditions
TA=25C Pulse: f = 10kHz, Duty cycle = 50%, IF = 10mA, VCC = 5.0 V, RL= 1.9kW,CL = 15pF V THHL = 1.5V
Fig.
5,6, 8
Note
9
TPLH
0.15 0.03
0.30
0.80 1.00
TA=25C
Pulse: f = 10kHz, Duty cycle = 5,6, 50%, IF = 10mA, VCC = 5.0 V, 8 RL = 1.9kW CL = 15pF V THLH = 2.0V Pulse: f=10kHz, Duty cycle =50%, IF = 10mA, VCC = 5.0V, RL = 1.9kW, CL = 15pF, V THHL = 1.5V, V THLH = 2.0V Pulse: f = 10kHz, Duty cycle = 50%, IF = 10mA, VCC = 5.0V, RL = 1.9kW, CL = 15pF, V THHL = 1.5V, V THLH = 2.0V VCM = 1500Vp-p, IF = 0mA, TA = 25C, R = 1.9kW 9
9
PWD
0 0
0.40
0. 45 0.85
TA=25C
12
Propagation Delay tPLH-tPHL 0 Difference Between 0 Any 2 Parts Common Mode Transient Immunity at Logic High Output |CMH| 15
0.40
0.50 0.90
TA=25C
13
30
8, 9
Common Mode |CML| Transient Immunity at Logic Low Output
15
30
kV/ms
VCM = 1500Vp-p, IF = 10mA, TA = 25C, RL = 1.9kW
Notes: 1. Derate linearly above 85C free-air temperature at a rate of 0.25 mA/C. 2. Derate linearly above 85C free-air temperature at a rate of 0.30 mA/C. 3. Derate linearly above 85C free-air temperature at a rate of 0.375 mW/C. 4. Derate linearly above 85C free-air temperature at a rate of 1.875 mW/C. 5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100. 6. Device considered a two terminal device: pin 1 and 3 shorted together and pins 4, 5 and 6 shorted together. 7. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 VRMS for 1 second (leakage detection current limit, II-O 5 A). 8. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V). 9. The 1.9 k load represents 1 TTL unit load of 1.6 mA and the 5.6 k pull-up resistor. 10. The frequency at which the ac output voltage is 3 dB below its mid-frequency value. 11. Use of a 0.1 F bypass capacitor connected between pins 4 and 6 is recommended. 12. Pulse Width Distortion (PWD) is defined as |tPHL - tPLH| for any given device. 13. The difference between tPLH and tPHL between any two parts under the same test condition. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage 4500 VRMS for 1 second (leakage detection current limit, II-O 5 A). 14. Pulse: f = 0 kHz, Duty Cycle = 10%. 15. Use of a 0.1 F bypass capacitor connected between pins 4 and 6 can improve performance by filtering power supply line noise. 16. The difference between tPLH and tPHL between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.) 17. Common mode transient immunity in a Logic High level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 3.0 V). 18. Common mode transient immunity in a Logic Low level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 1.0 V). 19. Pulse Width Distortion (PWD) is defined as |tPHL - tPLH| for any given device.
8
IO - OUTPUT CURRENT - mA
25 20 15 10 5 0 0
15mA 10mA IF=5mA
NORMALIZED CURRENT TRANSFER RATIO
30
VCC = 5.0V TA = 25oC
40mA 35mA 30mA 25mA 20mA
10 VO - OUTPUT VOLTAGE - V
20
2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0.1
Normalized IF = 10mA VO= 0.4V VCC= 5V TA= 25oC
1 10 IF - INPUT CURRENT - mA
100
Figure 1. DC and Pulsed Transfer Characteristics.
Figure 2. Current Transfer Ratio vs Input Current
IF - FORWARD CURRENT - mA
10.00 1.00 0.10 0.01 1.2
IF + VF - TA = 25oC
NORMALIZED CURRENT TRANSFER RATIO
100.00
1.1 1.0 0.9 0.8 0.7 0.6 -60 Normalized IF= 10mA, VO = 0.4V VCC = 5.0V TA = 25oC -20 20 60 TA - TEMPERATURE - oC 100 140
1.3 1.4 1.5 VF - FORWARD VOLTAGE - VOLTS
1.6
Figure 3. Input Current vs Forward Voltage
Figure 4. Current Transfer Ratio vs Temperature
800 T P - PROPOGATION DELAY - ns 600 400 200 0 -60 TpLH TpHL tp - PROPOGATION DELAY - s IF=10mA, VCC=5.0V RL=1.9k
VCC = 5.0 V, TA = 25oC CL = 15pF, RL = 1.9 k 0.8 VTHHL = 1.5V VTHLH = 2.0V, 50% Duty Cycle 0.6 IF = 10mA 0.4 0.2 0
1
TPLH
TPHL 0 2 4 6 RL - LOAD RESISTANCE - kohm 8 10
-20
20 60 TA - TEMPERATURE - oC
100
140
Figure 5. Propagation Delay vs Temperature
Figure 6. Propagation Delay Time vs Load Resistance
9
I OH - LOGIC HIGH OUTPUT CURRENT - nA
1000 100 10 1 0.1 0.01 -60 -20 20 60 o TA - TEMPERATURE - C 100 140 I F = 0mA VO = VCC = 5.0V
Figure 7. Logic High Output Current vs Temperature.
IF 0 VO 1.5 V 5V 1.5 V V OL t PLH
IF PULSE GEN. Z O = 50 t r = 5 ns 10% DUTY CYCLE 1/f 100 s I F MONITOR 100
1
6 5
+5 V RL 0.1F VO C L = 15 pF
3
4
t PHL Figure 8. Switching Test Circuit
V CM 0V
10 V 10% tr
t r , tf = 16 ns 90% 90% 10% tf 5V
IF B A V FF 3 V CM + PULSE GEN. V CC 1 6 5 0.1F 4 RL VO
VO SWITCH AT A: IF = 0 mA VO SWITCH AT B: IF = 1.6 mA
V OL
Figure 9. Test Circuit for Transient Immunity and Typical Waveforms.
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright (c) 2005-2008 Avago Technologies. All rights reserved. AV02-0948EN - December 23, 2008

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